- reduced instruction set computing microprocessor
- микропроцессор с сокращённым набором команд, RISC-микропроцессор
English-Russian electronics dictionary .
reduced instruction set computing microprocessor
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Reduced instruction set computer — The acronym RISC (pronounced risk ), for reduced instruction set computing, represents a CPU design strategy emphasizing the insight that simplified instructions which do less may still provide for higher performance if this simplicity can be… … Wikipedia
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Instruction pipeline — Pipelining redirects here. For HTTP pipelining, see HTTP pipelining. Basic five stage pipeline in a RISC machine (IF = Instruction Fetch, ID = Instruction Decode, EX = Execute, MEM = Memory access, WB = Register write back). In the fourth clock… … Wikipedia
Reconfigurable computing — is a computer architecture combining some of the flexibility of software with the high performance of hardware by processing with very flexible high speed computing fabrics like field programmable gate arrays (FPGAs). The principal difference… … Wikipedia
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DEC Alpha — Also called the DEC Alpha AXP or the DECchip 21264. A 64 bit, RISC (reduced instruction set computing) microprocessor from Digital Equipment Corporation (DEC), first introduced in 1992. The Alpha is a superscalar, superpipelined design,… … Dictionary of networking
computer — computerlike, adj. /keuhm pyooh teuhr/, n. 1. Also called processor. an electronic device designed to accept data, perform prescribed mathematical and logical operations at high speed, and display the results of these operations. Cf. analog… … Universalium
